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5aecbf282f1e4df7e6a0e2fbdf6ff17caf9024ba
sa2/include/gba.inc
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Seamus b847b8902e Initial commit
2021-02-18 17:48:52 -05:00

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@-------------------------------------------------------------------------------
@ Program Status Register
@-------------------------------------------------------------------------------
PSR_USR_MODE = 0x00000010
PSR_FIQ_MODE = 0x00000011
PSR_IRQ_MODE = 0x00000012
PSR_SVC_MODE = 0x00000013
PSR_ABT_MODE = 0x00000017
PSR_UND_MODE = 0x0000001B
PSR_SYS_MODE = 0x0000001F
PSR_MODE_MASK = 0x0000001F
PSR_THUMB_BIT = 0x00000020
PSR_FIQ_DISABLE_BIT = 0x00000040
PSR_IRQ_DISABLE_BIT = 0x00000080
@-------------------------------------------------------------------------------
@ Memory
@-------------------------------------------------------------------------------
EWRAM_START = 0x02000000
EWRAM_END = EWRAM_START + 0x40000
IWRAM_START = 0x03000000
IWRAM_END = IWRAM_START + 0x8000
REG_BASE = 0x04000000
PLTT = 0x05000000
BG_PLTT = PLTT
OBJ_PLTT = PLTT + 0x200
VRAM = 0x06000000
BG_VRAM = VRAM
OBJ_VRAM0 = VRAM + 0x10000 @ text-mode BG
OBJ_VRAM1 = VRAM + 0x14000 @ bitmap-mode BG
OAM = 0x07000000
SOUND_INFO_PTR = 0x3007FF0
INTR_CHECK = 0x3007FF8
INTR_VECTOR = 0x3007FFC
ROM = 0x08000000
@-------------------------------------------------------------------------------
@ I/O Register Offsets
@-------------------------------------------------------------------------------
REG_OFFSET_DISPCNT = 0x0
REG_OFFSET_DISPSTAT = 0x4
REG_OFFSET_VCOUNT = 0x6
REG_OFFSET_BG0CNT = 0x8
REG_OFFSET_BG1CNT = 0xa
REG_OFFSET_BG2CNT = 0xc
REG_OFFSET_BG3CNT = 0xe
REG_OFFSET_BG0HOFS = 0x10
REG_OFFSET_BG0VOFS = 0x12
REG_OFFSET_BG1HOFS = 0x14
REG_OFFSET_BG1VOFS = 0x16
REG_OFFSET_BG2HOFS = 0x18
REG_OFFSET_BG2VOFS = 0x1a
REG_OFFSET_BG3HOFS = 0x1c
REG_OFFSET_BG3VOFS = 0x1e
REG_OFFSET_BG2PA = 0x20
REG_OFFSET_BG2PB = 0x22
REG_OFFSET_BG2PC = 0x24
REG_OFFSET_BG2PD = 0x26
REG_OFFSET_BG2X_L = 0x28
REG_OFFSET_BG2X_H = 0x2a
REG_OFFSET_BG2Y_L = 0x2c
REG_OFFSET_BG2Y_H = 0x2e
REG_OFFSET_BG3PA = 0x30
REG_OFFSET_BG3PB = 0x32
REG_OFFSET_BG3PC = 0x34
REG_OFFSET_BG3PD = 0x36
REG_OFFSET_BG3X_L = 0x38
REG_OFFSET_BG3X_H = 0x3a
REG_OFFSET_BG3Y_L = 0x3c
REG_OFFSET_BG3Y_H = 0x3e
REG_OFFSET_WIN0H = 0x40
REG_OFFSET_WIN1H = 0x42
REG_OFFSET_WIN0V = 0x44
REG_OFFSET_WIN1V = 0x46
REG_OFFSET_WININ = 0x48
REG_OFFSET_WINOUT = 0x4a
REG_OFFSET_MOSAIC = 0x4c
REG_OFFSET_BLDCNT = 0x50
REG_OFFSET_BLDALPHA = 0x52
REG_OFFSET_BLDY = 0x54
REG_OFFSET_SOUND1CNT = 0x60
REG_OFFSET_SOUND1CNT_L = 0x60
REG_OFFSET_NR10 = 0x60
REG_OFFSET_SOUND1CNT_H = 0x62
REG_OFFSET_NR11 = 0x62
REG_OFFSET_NR12 = 0x63
REG_OFFSET_SOUND1CNT_X = 0x64
REG_OFFSET_NR13 = 0x64
REG_OFFSET_NR14 = 0x65
REG_OFFSET_SOUND2CNT = 0x68
REG_OFFSET_SOUND2CNT_L = 0x68
REG_OFFSET_NR21 = 0x68
REG_OFFSET_NR22 = 0x69
REG_OFFSET_SOUND2CNT_H = 0x6c
REG_OFFSET_NR23 = 0x6c
REG_OFFSET_NR24 = 0x6d
REG_OFFSET_SOUND3CNT = 0x70
REG_OFFSET_SOUND3CNT_L = 0x70
REG_OFFSET_NR30 = 0x70
REG_OFFSET_SOUND3CNT_H = 0x72
REG_OFFSET_NR31 = 0x72
REG_OFFSET_NR32 = 0x73
REG_OFFSET_SOUND3CNT_X = 0x74
REG_OFFSET_NR33 = 0x74
REG_OFFSET_NR34 = 0x75
REG_OFFSET_SOUND4CNT = 0x78
REG_OFFSET_SOUND4CNT_L = 0x78
REG_OFFSET_NR41 = 0x78
REG_OFFSET_NR42 = 0x79
REG_OFFSET_SOUND4CNT_H = 0x7c
REG_OFFSET_NR43 = 0x7c
REG_OFFSET_NR44 = 0x7d
REG_OFFSET_SOUNDCNT = 0x80
REG_OFFSET_SOUNDCNT_L = 0x80
REG_OFFSET_NR50 = 0x80
REG_OFFSET_NR51 = 0x81
REG_OFFSET_SOUNDCNT_H = 0x82
REG_OFFSET_SOUNDCNT_X = 0x84
REG_OFFSET_NR52 = 0x84
REG_OFFSET_SOUNDBIAS = 0x88
REG_OFFSET_WAVE_RAM = 0x90
REG_OFFSET_WAVE_RAM0 = 0x90
REG_OFFSET_WAVE_RAM0_L = 0x90
REG_OFFSET_WAVE_RAM0_H = 0x92
REG_OFFSET_WAVE_RAM1 = 0x94
REG_OFFSET_WAVE_RAM1_L = 0x94
REG_OFFSET_WAVE_RAM1_H = 0x96
REG_OFFSET_WAVE_RAM2 = 0x98
REG_OFFSET_WAVE_RAM2_L = 0x98
REG_OFFSET_WAVE_RAM2_H = 0x9a
REG_OFFSET_WAVE_RAM3 = 0x9c
REG_OFFSET_WAVE_RAM3_L = 0x9c
REG_OFFSET_WAVE_RAM3_H = 0x9e
REG_OFFSET_FIFO = 0xa0
REG_OFFSET_FIFO_A = 0xa0
REG_OFFSET_FIFO_A_L = 0xa0
REG_OFFSET_FIFO_A_H = 0xa2
REG_OFFSET_FIFO_B = 0xa4
REG_OFFSET_FIFO_B_L = 0xa4
REG_OFFSET_FIFO_B_H = 0xa6
REG_OFFSET_DMA0 = 0xb0
REG_OFFSET_DMA0SAD = 0xb0
REG_OFFSET_DMA0SAD_L = 0xb0
REG_OFFSET_DMA0SAD_H = 0xb2
REG_OFFSET_DMA0DAD = 0xb4
REG_OFFSET_DMA0DAD_L = 0xb4
REG_OFFSET_DMA0DAD_H = 0xb6
REG_OFFSET_DMA0CNT = 0xb8
REG_OFFSET_DMA0CNT_L = 0xb8
REG_OFFSET_DMA0CNT_H = 0xba
REG_OFFSET_DMA1 = 0xbc
REG_OFFSET_DMA1SAD = 0xbc
REG_OFFSET_DMA1SAD_L = 0xbc
REG_OFFSET_DMA1SAD_H = 0xbe
REG_OFFSET_DMA1DAD = 0xc0
REG_OFFSET_DMA1DAD_L = 0xc0
REG_OFFSET_DMA1DAD_H = 0xc2
REG_OFFSET_DMA1CNT = 0xc4
REG_OFFSET_DMA1CNT_L = 0xc4
REG_OFFSET_DMA1CNT_H = 0xc6
REG_OFFSET_DMA2 = 0xc8
REG_OFFSET_DMA2SAD = 0xc8
REG_OFFSET_DMA2SAD_L = 0xc8
REG_OFFSET_DMA2SAD_H = 0xca
REG_OFFSET_DMA2DAD = 0xcc
REG_OFFSET_DMA2DAD_L = 0xcc
REG_OFFSET_DMA2DAD_H = 0xce
REG_OFFSET_DMA2CNT = 0xd0
REG_OFFSET_DMA2CNT_L = 0xd0
REG_OFFSET_DMA2CNT_H = 0xd2
REG_OFFSET_DMA3 = 0xd4
REG_OFFSET_DMA3SAD = 0xd4
REG_OFFSET_DMA3SAD_L = 0xd4
REG_OFFSET_DMA3SAD_H = 0xd6
REG_OFFSET_DMA3DAD = 0xd8
REG_OFFSET_DMA3DAD_L = 0xd8
REG_OFFSET_DMA3DAD_H = 0xda
REG_OFFSET_DMA3CNT = 0xdc
REG_OFFSET_DMA3CNT_L = 0xdc
REG_OFFSET_DMA3CNT_H = 0xde
REG_OFFSET_TM0CNT = 0x100
REG_OFFSET_TM0CNT_L = 0x100
REG_OFFSET_TM0CNT_H = 0x102
REG_OFFSET_TM1CNT = 0x104
REG_OFFSET_TM1CNT_L = 0x104
REG_OFFSET_TM1CNT_H = 0x106
REG_OFFSET_TM2CNT = 0x108
REG_OFFSET_TM2CNT_L = 0x108
REG_OFFSET_TM2CNT_H = 0x10a
REG_OFFSET_TM3CNT = 0x10c
REG_OFFSET_TM3CNT_L = 0x10c
REG_OFFSET_TM3CNT_H = 0x10e
REG_OFFSET_SIOCNT = 0x128
REG_OFFSET_SIODATA8 = 0x12a
REG_OFFSET_SIODATA32 = 0x120
REG_OFFSET_SIOMLT_SEND = 0x12a
REG_OFFSET_SIOMLT_RECV = 0x120
REG_OFFSET_SIOMULTI0 = 0x120
REG_OFFSET_SIOMULTI1 = 0x122
REG_OFFSET_SIOMULTI2 = 0x124
REG_OFFSET_SIOMULTI3 = 0x126
REG_OFFSET_KEYINPUT = 0x130
REG_OFFSET_KEYCNT = 0x132
REG_OFFSET_RCNT = 0x134
REG_OFFSET_JOYCNT = 0x140
REG_OFFSET_JOYSTAT = 0x158
REG_OFFSET_JOY_RECV = 0x150
REG_OFFSET_JOY_RECV_L = 0x150
REG_OFFSET_JOY_RECV_H = 0x152
REG_OFFSET_JOY_TRANS = 0x154
REG_OFFSET_JOY_TRANS_L = 0x154
REG_OFFSET_JOY_TRANS_H = 0x156
REG_OFFSET_IME = 0x208
REG_OFFSET_IE = 0x200
REG_OFFSET_IF = 0x202
REG_OFFSET_WAITCNT = 0x204
@-------------------------------------------------------------------------------
@ I/O Register Addresses
@-------------------------------------------------------------------------------
REG_DISPCNT = (REG_BASE + REG_OFFSET_DISPCNT)
REG_DISPSTAT = (REG_BASE + REG_OFFSET_DISPSTAT)
REG_VCOUNT = (REG_BASE + REG_OFFSET_VCOUNT)
REG_BG0CNT = (REG_BASE + REG_OFFSET_BG0CNT)
REG_BG1CNT = (REG_BASE + REG_OFFSET_BG1CNT)
REG_BG2CNT = (REG_BASE + REG_OFFSET_BG2CNT)
REG_BG3CNT = (REG_BASE + REG_OFFSET_BG3CNT)
REG_BG0HOFS = (REG_BASE + REG_OFFSET_BG0HOFS)
REG_BG0VOFS = (REG_BASE + REG_OFFSET_BG0VOFS)
REG_BG1HOFS = (REG_BASE + REG_OFFSET_BG1HOFS)
REG_BG1VOFS = (REG_BASE + REG_OFFSET_BG1VOFS)
REG_BG2HOFS = (REG_BASE + REG_OFFSET_BG2HOFS)
REG_BG2VOFS = (REG_BASE + REG_OFFSET_BG2VOFS)
REG_BG3HOFS = (REG_BASE + REG_OFFSET_BG3HOFS)
REG_BG3VOFS = (REG_BASE + REG_OFFSET_BG3VOFS)
REG_BG2PA = (REG_BASE + REG_OFFSET_BG2PA)
REG_BG2PB = (REG_BASE + REG_OFFSET_BG2PB)
REG_BG2PC = (REG_BASE + REG_OFFSET_BG2PC)
REG_BG2PD = (REG_BASE + REG_OFFSET_BG2PD)
REG_BG2X_L = (REG_BASE + REG_OFFSET_BG2X_L)
REG_BG2X_H = (REG_BASE + REG_OFFSET_BG2X_H)
REG_BG2Y_L = (REG_BASE + REG_OFFSET_BG2Y_L)
REG_BG2Y_H = (REG_BASE + REG_OFFSET_BG2Y_H)
REG_BG3PA = (REG_BASE + REG_OFFSET_BG3PA)
REG_BG3PB = (REG_BASE + REG_OFFSET_BG3PB)
REG_BG3PC = (REG_BASE + REG_OFFSET_BG3PC)
REG_BG3PD = (REG_BASE + REG_OFFSET_BG3PD)
REG_BG3X_L = (REG_BASE + REG_OFFSET_BG3X_L)
REG_BG3X_H = (REG_BASE + REG_OFFSET_BG3X_H)
REG_BG3Y_L = (REG_BASE + REG_OFFSET_BG3Y_L)
REG_BG3Y_H = (REG_BASE + REG_OFFSET_BG3Y_H)
REG_WIN0H = (REG_BASE + REG_OFFSET_WIN0H)
REG_WIN1H = (REG_BASE + REG_OFFSET_WIN1H)
REG_WIN0V = (REG_BASE + REG_OFFSET_WIN0V)
REG_WIN1V = (REG_BASE + REG_OFFSET_WIN1V)
REG_WININ = (REG_BASE + REG_OFFSET_WININ)
REG_WINOUT = (REG_BASE + REG_OFFSET_WINOUT)
REG_MOSAIC = (REG_BASE + REG_OFFSET_MOSAIC)
REG_BLDCNT = (REG_BASE + REG_OFFSET_BLDCNT)
REG_BLDALPHA = (REG_BASE + REG_OFFSET_BLDALPHA)
REG_BLDY = (REG_BASE + REG_OFFSET_BLDY)
REG_SOUND1CNT = (REG_BASE + REG_OFFSET_SOUND1CNT)
REG_SOUND1CNT_L = (REG_BASE + REG_OFFSET_SOUND1CNT_L)
REG_NR10 = (REG_BASE + REG_OFFSET_NR10)
REG_SOUND1CNT_H = (REG_BASE + REG_OFFSET_SOUND1CNT_H)
REG_NR11 = (REG_BASE + REG_OFFSET_NR11)
REG_NR12 = (REG_BASE + REG_OFFSET_NR12)
REG_SOUND1CNT_X = (REG_BASE + REG_OFFSET_SOUND1CNT_X)
REG_NR13 = (REG_BASE + REG_OFFSET_NR13)
REG_NR14 = (REG_BASE + REG_OFFSET_NR14)
REG_SOUND2CNT = (REG_BASE + REG_OFFSET_SOUND2CNT)
REG_SOUND2CNT_L = (REG_BASE + REG_OFFSET_SOUND2CNT_L)
REG_NR21 = (REG_BASE + REG_OFFSET_NR21)
REG_NR22 = (REG_BASE + REG_OFFSET_NR22)
REG_SOUND2CNT_H = (REG_BASE + REG_OFFSET_SOUND2CNT_H)
REG_NR23 = (REG_BASE + REG_OFFSET_NR23)
REG_NR24 = (REG_BASE + REG_OFFSET_NR24)
REG_SOUND3CNT = (REG_BASE + REG_OFFSET_SOUND3CNT)
REG_SOUND3CNT_L = (REG_BASE + REG_OFFSET_SOUND3CNT_L)
REG_NR30 = (REG_BASE + REG_OFFSET_NR30)
REG_SOUND3CNT_H = (REG_BASE + REG_OFFSET_SOUND3CNT_H)
REG_NR31 = (REG_BASE + REG_OFFSET_NR31)
REG_NR32 = (REG_BASE + REG_OFFSET_NR32)
REG_SOUND3CNT_X = (REG_BASE + REG_OFFSET_SOUND3CNT_X)
REG_NR33 = (REG_BASE + REG_OFFSET_NR33)
REG_NR34 = (REG_BASE + REG_OFFSET_NR34)
REG_SOUND4CNT = (REG_BASE + REG_OFFSET_SOUND4CNT)
REG_SOUND4CNT_L = (REG_BASE + REG_OFFSET_SOUND4CNT_L)
REG_NR41 = (REG_BASE + REG_OFFSET_NR41)
REG_NR42 = (REG_BASE + REG_OFFSET_NR42)
REG_SOUND4CNT_H = (REG_BASE + REG_OFFSET_SOUND4CNT_H)
REG_NR43 = (REG_BASE + REG_OFFSET_NR43)
REG_NR44 = (REG_BASE + REG_OFFSET_NR44)
REG_SOUNDCNT = (REG_BASE + REG_OFFSET_SOUNDCNT)
REG_SOUNDCNT_L = (REG_BASE + REG_OFFSET_SOUNDCNT_L)
REG_NR50 = (REG_BASE + REG_OFFSET_NR50)
REG_NR51 = (REG_BASE + REG_OFFSET_NR51)
REG_SOUNDCNT_H = (REG_BASE + REG_OFFSET_SOUNDCNT_H)
REG_SOUNDCNT_X = (REG_BASE + REG_OFFSET_SOUNDCNT_X)
REG_NR52 = (REG_BASE + REG_OFFSET_NR52)
REG_SOUNDBIAS = (REG_BASE + REG_OFFSET_SOUNDBIAS)
REG_WAVE_RAM = (REG_BASE + REG_OFFSET_WAVE_RAM)
REG_WAVE_RAM0 = (REG_BASE + REG_OFFSET_WAVE_RAM0)
REG_WAVE_RAM0_L = (REG_BASE + REG_OFFSET_WAVE_RAM0_L)
REG_WAVE_RAM0_H = (REG_BASE + REG_OFFSET_WAVE_RAM0_H)
REG_WAVE_RAM1 = (REG_BASE + REG_OFFSET_WAVE_RAM1)
REG_WAVE_RAM1_L = (REG_BASE + REG_OFFSET_WAVE_RAM1_L)
REG_WAVE_RAM1_H = (REG_BASE + REG_OFFSET_WAVE_RAM1_H)
REG_WAVE_RAM2 = (REG_BASE + REG_OFFSET_WAVE_RAM2)
REG_WAVE_RAM2_L = (REG_BASE + REG_OFFSET_WAVE_RAM2_L)
REG_WAVE_RAM2_H = (REG_BASE + REG_OFFSET_WAVE_RAM2_H)
REG_WAVE_RAM3 = (REG_BASE + REG_OFFSET_WAVE_RAM3)
REG_WAVE_RAM3_L = (REG_BASE + REG_OFFSET_WAVE_RAM3_L)
REG_WAVE_RAM3_H = (REG_BASE + REG_OFFSET_WAVE_RAM3_H)
REG_FIFO = (REG_BASE + REG_OFFSET_FIFO)
REG_FIFO_A = (REG_BASE + REG_OFFSET_FIFO_A)
REG_FIFO_A_L = (REG_BASE + REG_OFFSET_FIFO_A_L)
REG_FIFO_A_H = (REG_BASE + REG_OFFSET_FIFO_A_H)
REG_FIFO_B = (REG_BASE + REG_OFFSET_FIFO_B)
REG_FIFO_B_L = (REG_BASE + REG_OFFSET_FIFO_B_L)
REG_FIFO_B_H = (REG_BASE + REG_OFFSET_FIFO_B_H)
REG_DMA0 = (REG_BASE + REG_OFFSET_DMA0)
REG_DMA0SAD = (REG_BASE + REG_OFFSET_DMA0SAD)
REG_DMA0SAD_L = (REG_BASE + REG_OFFSET_DMA0SAD_L)
REG_DMA0SAD_H = (REG_BASE + REG_OFFSET_DMA0SAD_H)
REG_DMA0DAD = (REG_BASE + REG_OFFSET_DMA0DAD)
REG_DMA0DAD_L = (REG_BASE + REG_OFFSET_DMA0DAD_L)
REG_DMA0DAD_H = (REG_BASE + REG_OFFSET_DMA0DAD_H)
REG_DMA0CNT = (REG_BASE + REG_OFFSET_DMA0CNT)
REG_DMA0CNT_L = (REG_BASE + REG_OFFSET_DMA0CNT_L)
REG_DMA0CNT_H = (REG_BASE + REG_OFFSET_DMA0CNT_H)
REG_DMA1 = (REG_BASE + REG_OFFSET_DMA1)
REG_DMA1SAD = (REG_BASE + REG_OFFSET_DMA1SAD)
REG_DMA1SAD_L = (REG_BASE + REG_OFFSET_DMA1SAD_L)
REG_DMA1SAD_H = (REG_BASE + REG_OFFSET_DMA1SAD_H)
REG_DMA1DAD = (REG_BASE + REG_OFFSET_DMA1DAD)
REG_DMA1DAD_L = (REG_BASE + REG_OFFSET_DMA1DAD_L)
REG_DMA1DAD_H = (REG_BASE + REG_OFFSET_DMA1DAD_H)
REG_DMA1CNT = (REG_BASE + REG_OFFSET_DMA1CNT)
REG_DMA1CNT_L = (REG_BASE + REG_OFFSET_DMA1CNT_L)
REG_DMA1CNT_H = (REG_BASE + REG_OFFSET_DMA1CNT_H)
REG_DMA2 = (REG_BASE + REG_OFFSET_DMA2)
REG_DMA2SAD = (REG_BASE + REG_OFFSET_DMA2SAD)
REG_DMA2SAD_L = (REG_BASE + REG_OFFSET_DMA2SAD_L)
REG_DMA2SAD_H = (REG_BASE + REG_OFFSET_DMA2SAD_H)
REG_DMA2DAD = (REG_BASE + REG_OFFSET_DMA2DAD)
REG_DMA2DAD_L = (REG_BASE + REG_OFFSET_DMA2DAD_L)
REG_DMA2DAD_H = (REG_BASE + REG_OFFSET_DMA2DAD_H)
REG_DMA2CNT = (REG_BASE + REG_OFFSET_DMA2CNT)
REG_DMA2CNT_L = (REG_BASE + REG_OFFSET_DMA2CNT_L)
REG_DMA2CNT_H = (REG_BASE + REG_OFFSET_DMA2CNT_H)
REG_DMA3 = (REG_BASE + REG_OFFSET_DMA3)
REG_DMA3SAD = (REG_BASE + REG_OFFSET_DMA3SAD)
REG_DMA3SAD_L = (REG_BASE + REG_OFFSET_DMA3SAD_L)
REG_DMA3SAD_H = (REG_BASE + REG_OFFSET_DMA3SAD_H)
REG_DMA3DAD = (REG_BASE + REG_OFFSET_DMA3DAD)
REG_DMA3DAD_L = (REG_BASE + REG_OFFSET_DMA3DAD_L)
REG_DMA3DAD_H = (REG_BASE + REG_OFFSET_DMA3DAD_H)
REG_DMA3CNT = (REG_BASE + REG_OFFSET_DMA3CNT)
REG_DMA3CNT_L = (REG_BASE + REG_OFFSET_DMA3CNT_L)
REG_DMA3CNT_H = (REG_BASE + REG_OFFSET_DMA3CNT_H)
REG_TM0CNT = (REG_BASE + REG_OFFSET_TM0CNT)
REG_TM0CNT_L = (REG_BASE + REG_OFFSET_TM0CNT_L)
REG_TM0CNT_H = (REG_BASE + REG_OFFSET_TM0CNT_H)
REG_TM1CNT = (REG_BASE + REG_OFFSET_TM1CNT)
REG_TM1CNT_L = (REG_BASE + REG_OFFSET_TM1CNT_L)
REG_TM1CNT_H = (REG_BASE + REG_OFFSET_TM1CNT_H)
REG_TM2CNT = (REG_BASE + REG_OFFSET_TM2CNT)
REG_TM2CNT_L = (REG_BASE + REG_OFFSET_TM2CNT_L)
REG_TM2CNT_H = (REG_BASE + REG_OFFSET_TM2CNT_H)
REG_TM3CNT = (REG_BASE + REG_OFFSET_TM3CNT)
REG_TM3CNT_L = (REG_BASE + REG_OFFSET_TM3CNT_L)
REG_TM3CNT_H = (REG_BASE + REG_OFFSET_TM3CNT_H)
REG_SIOCNT = (REG_BASE + REG_OFFSET_SIOCNT)
REG_SIODATA8 = (REG_BASE + REG_OFFSET_SIODATA8)
REG_SIODATA32 = (REG_BASE + REG_OFFSET_SIODATA32)
REG_SIOMLT_SEND = (REG_BASE + REG_OFFSET_SIOMLT_SEND)
REG_SIOMLT_RECV = (REG_BASE + REG_OFFSET_SIOMLT_RECV)
REG_SIOMULTI0 = (REG_BASE + REG_OFFSET_SIOMULTI0)
REG_SIOMULTI1 = (REG_BASE + REG_OFFSET_SIOMULTI1)
REG_SIOMULTI2 = (REG_BASE + REG_OFFSET_SIOMULTI2)
REG_SIOMULTI3 = (REG_BASE + REG_OFFSET_SIOMULTI3)
REG_KEYINPUT = (REG_BASE + REG_OFFSET_KEYINPUT)
REG_KEYCNT = (REG_BASE + REG_OFFSET_KEYCNT)
REG_RCNT = (REG_BASE + REG_OFFSET_RCNT)
REG_JOYCNT = (REG_BASE + REG_OFFSET_JOYCNT)
REG_JOYSTAT = (REG_BASE + REG_OFFSET_JOYSTAT)
REG_JOY_RECV = (REG_BASE + REG_OFFSET_JOY_RECV)
REG_JOY_RECV_L = (REG_BASE + REG_OFFSET_JOY_RECV_L)
REG_JOY_RECV_H = (REG_BASE + REG_OFFSET_JOY_RECV_H)
REG_JOY_TRANS = (REG_BASE + REG_OFFSET_JOY_TRANS)
REG_JOY_TRANS_L = (REG_BASE + REG_OFFSET_JOY_TRANS_L)
REG_JOY_TRANS_H = (REG_BASE + REG_OFFSET_JOY_TRANS_H)
REG_IME = (REG_BASE + REG_OFFSET_IME)
REG_IE = (REG_BASE + REG_OFFSET_IE)
REG_IF = (REG_BASE + REG_OFFSET_IF)
REG_WAITCNT = (REG_BASE + REG_OFFSET_WAITCNT)
@-------------------------------------------------------------------------------
@ I/O Register Flags
@-------------------------------------------------------------------------------
@ DMA
DMA_DEST_INC = 0x0000
DMA_DEST_DEC = 0x0020
DMA_DEST_FIXED = 0x0040
DMA_DEST_RELOAD = 0x0060
DMA_SRC_INC = 0x0000
DMA_SRC_DEC = 0x0080
DMA_SRC_FIXED = 0x0100
DMA_REPEAT = 0x0200
DMA_16BIT = 0x0000
DMA_32BIT = 0x0400
DMA_DREQ_ON = 0x0800
DMA_START_NOW = 0x0000
DMA_START_VBLANK = 0x1000
DMA_START_HBLANK = 0x2000
DMA_START_SPECIAL = 0x3000
DMA_START_MASK = 0x3000
DMA_INTR_ENABLE = 0x4000
DMA_ENABLE = 0x8000
@ Interrupt Flags
INTR_FLAG_VBLANK = (1 << 0)
INTR_FLAG_HBLANK = (1 << 1)
INTR_FLAG_VCOUNT = (1 << 2)
INTR_FLAG_TIMER0 = (1 << 3)
INTR_FLAG_TIMER1 = (1 << 4)
INTR_FLAG_TIMER2 = (1 << 5)
INTR_FLAG_TIMER3 = (1 << 6)
INTR_FLAG_SERIAL = (1 << 7)
INTR_FLAG_DMA0 = (1 << 8)
INTR_FLAG_DMA1 = (1 << 9)
INTR_FLAG_DMA2 = (1 << 10)
INTR_FLAG_DMA3 = (1 << 11)
INTR_FLAG_KEYPAD = (1 << 12)
INTR_FLAG_GAMEPAK = (1 << 13)
VCOUNT_VBLANK = 160
TOTAL_SCANLINES = 228
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