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64bit compilation fixes, macos fixes(#158)

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* Order DMA register types in the same way

* Fix compilation error in zone_6 BG

* More zone_6 palette fixes

* Some DMA 64 fixes

* fix macos build

---------

Co-authored-by: Oliver Bell <freshollie@gmail.com>
This commit is contained in:
JaceCearandOliver Bell authored and GitHub committed 2024-10-10 18:42:52 +01:00
1 parent 1bc34d0ac8
commit db858862eb
8 files changed
+49 -45
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.vscode/launch.json
Vendored
+16
View File
@@ -0,0 +1,16 @@
{
// Use IntelliSense to learn about possible attributes.
// Hover to view descriptions of existing attributes.
// For more information, visit: https://go.microsoft.com/fwlink/?linkid=830387
"version": "0.2.0",
"configurations": [
{
"name": "SDL Debug MacOS",
"type": "cppdbg",
"request": "launch",
"program": "${workspaceFolder}/sa2_debug.sdl",
"cwd": "${workspaceFolder}",
"MIMode": "lldb",
},
]
}
chao_garden/include/global.h
+1 -1
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@@ -33,7 +33,7 @@
#endif
/// IDE support
#if defined(__APPLE__) || defined(__CYGWIN__) || defined(__INTELLISENSE__)
#if defined(__CYGWIN__) || defined(__INTELLISENSE__)
// We define these when using certain IDEs to fool preproc
#define _(x) (x)
#define __(x) (x)
include/gba/dma_macros.h
+3 -3
View File
@@ -6,7 +6,7 @@
#if PLATFORM_GBA
#define DmaSet(dmaNum, src, dest, control) \
{ \
vu32 *dmaRegs = (vu32 *)REG_ADDR_DMA##dmaNum; \
vu32 *dmaRegs = (vu32 *)REG_ADDR_DMA##dmaNum##SAD; \
dmaRegs[0] = (vu32)(src); \
dmaRegs[1] = (vu32)(dest); \
dmaRegs[2] = (vu32)(control); \
@@ -69,7 +69,7 @@ extern void DmaSet(int dmaNum, const void *src, void *dest, u32 control);
#if PLATFORM_GBA
#define DmaStop(dmaNum) \
{ \
vu16 *dmaRegs = (vu16 *)REG_ADDR_DMA##dmaNum; \
vu16 *dmaRegs = (vu16 *)REG_ADDR_DMA##dmaNum##SAD; \
dmaRegs[5] &= ~(DMA_START_MASK | DMA_DREQ_ON | DMA_REPEAT); \
dmaRegs[5] &= ~DMA_ENABLE; \
dmaRegs[5]; \
@@ -164,7 +164,7 @@ extern void DmaStop(int dmaNum);
#if PLATFORM_GBA
#define DmaWait(dmaNum) \
{ \
vu32 *dmaRegs = (vu32 *)REG_ADDR_DMA##dmaNum; \
vu32 *dmaRegs = (vu32 *)REG_ADDR_DMA##dmaNum##SAD; \
while (dmaRegs[2] & (DMA_ENABLE << 16)) \
; \
}
include/gba/io_reg.h
+18 -30
View File
@@ -105,25 +105,21 @@ extern unsigned char REG_BASE[IO_SIZE];
#define REG_OFFSET_DMA 0xb0
#if !USE_NEW_DMA
#define REG_OFFSET_DMA0 REG_OFFSET_DMA
#define REG_OFFSET_DMA0SAD 0xb0
#define REG_OFFSET_DMA0SAD REG_OFFSET_DMA
#define REG_OFFSET_DMA0DAD 0xb4
#define REG_OFFSET_DMA0CNT 0xb8
#define REG_OFFSET_DMA0CNT_L 0xb8
#define REG_OFFSET_DMA0CNT_H 0xba
#define REG_OFFSET_DMA1 0xbc
#define REG_OFFSET_DMA1SAD 0xbc
#define REG_OFFSET_DMA1DAD 0xc0
#define REG_OFFSET_DMA1CNT 0xc4
#define REG_OFFSET_DMA1CNT_L 0xc4
#define REG_OFFSET_DMA1CNT_H 0xc6
#define REG_OFFSET_DMA2 0xc8
#define REG_OFFSET_DMA2SAD 0xc8
#define REG_OFFSET_DMA2DAD 0xcc
#define REG_OFFSET_DMA2CNT 0xd0
#define REG_OFFSET_DMA2CNT_L 0xd0
#define REG_OFFSET_DMA2CNT_H 0xd2
#define REG_OFFSET_DMA3 0xd4
#define REG_OFFSET_DMA3SAD 0xd4
#define REG_OFFSET_DMA3DAD 0xd8
#define REG_OFFSET_DMA3CNT 0xdc
@@ -132,20 +128,16 @@ extern unsigned char REG_BASE[IO_SIZE];
#else
// To fit this into the same memory footprint on 64bit,
// We need to put the control registers behind the pointers to avoid padding.
#define REG_OFFSET_DMA0 REG_OFFSET_DMA
#define REG_OFFSET_DMA0SAD REG_OFFSET_DMA0
#define REG_OFFSET_DMA0DAD (REG_OFFSET_DMA0SAD + sizeof(void*))
#define REG_OFFSET_DMA1 (REG_OFFSET_DMA0DAD + sizeof(void*))
#define REG_OFFSET_DMA1SAD REG_OFFSET_DMA1
#define REG_OFFSET_DMA1DAD (REG_OFFSET_DMA1SAD + sizeof(void*))
#define REG_OFFSET_DMA2 (REG_OFFSET_DMA1DAD + sizeof(void*))
#define REG_OFFSET_DMA2SAD REG_OFFSET_DMA2
#define REG_OFFSET_DMA2DAD (REG_OFFSET_DMA2SAD + sizeof(void*))
#define REG_OFFSET_DMA3 (REG_OFFSET_DMA2DAD + sizeof(void*))
#define REG_OFFSET_DMA3SAD REG_OFFSET_DMA3
#define REG_OFFSET_DMA3DAD (REG_OFFSET_DMA3SAD + sizeof(void*))
#define REG_OFFSET_DMA0SAD REG_OFFSET_DMA
#define REG_OFFSET_DMA1SAD (REG_OFFSET_DMA0SAD + sizeof(uintptr_t))
#define REG_OFFSET_DMA2SAD (REG_OFFSET_DMA1SAD + sizeof(uintptr_t))
#define REG_OFFSET_DMA3SAD (REG_OFFSET_DMA2SAD + sizeof(uintptr_t))
#define REG_OFFSET_DMA0DAD (REG_OFFSET_DMA3SAD + sizeof(uintptr_t))
#define REG_OFFSET_DMA1DAD (REG_OFFSET_DMA0DAD + sizeof(uintptr_t))
#define REG_OFFSET_DMA2DAD (REG_OFFSET_DMA1DAD + sizeof(uintptr_t))
#define REG_OFFSET_DMA3DAD (REG_OFFSET_DMA2DAD + sizeof(uintptr_t))
#define REG_OFFSET_DMA0CNT (REG_OFFSET_DMA3DAD + sizeof(void*))
#define REG_OFFSET_DMA0CNT (REG_OFFSET_DMA3DAD + sizeof(uintptr_t))
#define REG_OFFSET_DMA0CNT_L (REG_OFFSET_DMA0CNT + 0)
#define REG_OFFSET_DMA0CNT_H (REG_OFFSET_DMA0CNT_L + sizeof(uint16_t))
#define REG_OFFSET_DMA1CNT (REG_OFFSET_DMA0CNT_H + sizeof(uint16_t))
@@ -297,25 +289,21 @@ extern unsigned char REG_BASE[IO_SIZE];
#define REG_ADDR_FIFO_A (REG_BASE + REG_OFFSET_FIFO_A)
#define REG_ADDR_FIFO_B (REG_BASE + REG_OFFSET_FIFO_B)
#define REG_ADDR_DMA0 (REG_BASE + REG_OFFSET_DMA0)
#define REG_ADDR_DMA0SAD (REG_BASE + REG_OFFSET_DMA0SAD)
#define REG_ADDR_DMA0DAD (REG_BASE + REG_OFFSET_DMA0DAD)
#define REG_ADDR_DMA0CNT (REG_BASE + REG_OFFSET_DMA0CNT)
#define REG_ADDR_DMA0CNT_L (REG_BASE + REG_OFFSET_DMA0CNT_L)
#define REG_ADDR_DMA0CNT_H (REG_BASE + REG_OFFSET_DMA0CNT_H)
#define REG_ADDR_DMA1 (REG_BASE + REG_OFFSET_DMA1)
#define REG_ADDR_DMA1SAD (REG_BASE + REG_OFFSET_DMA1SAD)
#define REG_ADDR_DMA1DAD (REG_BASE + REG_OFFSET_DMA1DAD)
#define REG_ADDR_DMA1CNT (REG_BASE + REG_OFFSET_DMA1CNT)
#define REG_ADDR_DMA1CNT_L (REG_BASE + REG_OFFSET_DMA1CNT_L)
#define REG_ADDR_DMA1CNT_H (REG_BASE + REG_OFFSET_DMA1CNT_H)
#define REG_ADDR_DMA2 (REG_BASE + REG_OFFSET_DMA2)
#define REG_ADDR_DMA2SAD (REG_BASE + REG_OFFSET_DMA2SAD)
#define REG_ADDR_DMA2DAD (REG_BASE + REG_OFFSET_DMA2DAD)
#define REG_ADDR_DMA2CNT (REG_BASE + REG_OFFSET_DMA2CNT)
#define REG_ADDR_DMA2CNT_L (REG_BASE + REG_OFFSET_DMA2CNT_L)
#define REG_ADDR_DMA2CNT_H (REG_BASE + REG_OFFSET_DMA2CNT_H)
#define REG_ADDR_DMA3 (REG_BASE + REG_OFFSET_DMA3)
#define REG_ADDR_DMA3SAD (REG_BASE + REG_OFFSET_DMA3SAD)
#define REG_ADDR_DMA3DAD (REG_BASE + REG_OFFSET_DMA3DAD)
#define REG_ADDR_DMA3CNT (REG_BASE + REG_OFFSET_DMA3CNT)
@@ -460,26 +448,26 @@ extern unsigned char REG_BASE[IO_SIZE];
#define REG_FIFO_A (*(vu32 *)REG_ADDR_FIFO_A)
#define REG_FIFO_B (*(vu32 *)REG_ADDR_FIFO_B)
#define REG_DMA0SAD (*(vu32 *)REG_ADDR_DMA0SAD)
#define REG_DMA0DAD (*(vu32 *)REG_ADDR_DMA0DAD)
#define REG_DMA0SAD (*(volatile uintptr_t *)REG_ADDR_DMA0SAD)
#define REG_DMA0DAD (*(volatile uintptr_t *)REG_ADDR_DMA0DAD)
#define REG_DMA0CNT (*(vu32 *)REG_ADDR_DMA0CNT)
#define REG_DMA0CNT_L (*(vu16 *)REG_ADDR_DMA0CNT_L)
#define REG_DMA0CNT_H (*(vu16 *)REG_ADDR_DMA0CNT_H)
#define REG_DMA1SAD (*(vu32 *)REG_ADDR_DMA1SAD)
#define REG_DMA1DAD (*(vu32 *)REG_ADDR_DMA1DAD)
#define REG_DMA1SAD (*(volatile uintptr_t *)REG_ADDR_DMA1SAD)
#define REG_DMA1DAD (*(volatile uintptr_t *)REG_ADDR_DMA1DAD)
#define REG_DMA1CNT (*(vu32 *)REG_ADDR_DMA1CNT)
#define REG_DMA1CNT_L (*(vu16 *)REG_ADDR_DMA1CNT_L)
#define REG_DMA1CNT_H (*(vu16 *)REG_ADDR_DMA1CNT_H)
#define REG_DMA2SAD (*(vu32 *)REG_ADDR_DMA2SAD)
#define REG_DMA2DAD (*(vu32 *)REG_ADDR_DMA2DAD)
#define REG_DMA2SAD (*(volatile uintptr_t *)REG_ADDR_DMA2SAD)
#define REG_DMA2DAD (*(volatile uintptr_t *)REG_ADDR_DMA2DAD)
#define REG_DMA2CNT (*(vu32 *)REG_ADDR_DMA2CNT)
#define REG_DMA2CNT_L (*(vu16 *)REG_ADDR_DMA2CNT_L)
#define REG_DMA2CNT_H (*(vu16 *)REG_ADDR_DMA2CNT_H)
#define REG_DMA3SAD (*(vu32 *)REG_ADDR_DMA3SAD)
#define REG_DMA3DAD (*(vu32 *)REG_ADDR_DMA3DAD)
#define REG_DMA3SAD (*(volatile uintptr_t *)REG_ADDR_DMA3SAD)
#define REG_DMA3DAD (*(volatile uintptr_t *)REG_ADDR_DMA3DAD)
#define REG_DMA3CNT (*(vu32 *)REG_ADDR_DMA3CNT)
#define REG_DMA3CNT_L (*(vu16 *)REG_ADDR_DMA3CNT_L)
#define REG_DMA3CNT_H (*(vu16 *)REG_ADDR_DMA3CNT_H)
include/global.h
+1 -1
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@@ -63,7 +63,7 @@ typedef void (*VoidFn)(void);
#endif
/// IDE support
#if defined(__APPLE__) || defined(__CYGWIN__) || defined(__INTELLISENSE__)
#if defined(__CYGWIN__) || defined(__INTELLISENSE__)
// We define these when using certain IDEs to fool preproc
#define _(x) (x)
#define __(x) (x)
multi_boot/programs/subgame_loader/include/global.h
+1 -1
View File
@@ -33,7 +33,7 @@
#endif
/// IDE support
#if defined(__APPLE__) || defined(__CYGWIN__) || defined(__INTELLISENSE__)
#if defined(__CYGWIN__) || defined(__INTELLISENSE__)
// We define these when using certain IDEs to fool preproc
#define _(x) (x)
#define __(x) (x)
src/game/stage/background/zone_6.c
+6 -6
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@@ -230,7 +230,7 @@ NONMATCH("asm/non_matching/game/stage/background/sub_801D24C.inc", void sub_801D
b = (p0 * gUnknown_080D5C02[1][i][2]) >> 4;
b &= 0x1F;
gBgPalette[15 * 16 + i] = ((b << 10) + (g << 5) + (r << 0));
gBgPalette[(15 * 16) + i] = ((b << 10) + (g << 5) + (r << 0));
}
gFlags |= FLAGS_UPDATE_BACKGROUND_PALETTES;
@@ -330,7 +330,7 @@ NONMATCH("asm/non_matching/game/stage/background/StageBgUpdate_Zone6Acts12.inc",
gBgCntRegs[3] |= BGCNT_PRIORITY(2);
for (i = 0; i < 16; i++) {
gBgPalette[DISPLAY_WIDTH + i] = RGB_BLACK;
gBgPalette[(15 * 16) + i] = RGB_BLACK;
}
// jumps to _0801D8EE for this
@@ -363,7 +363,7 @@ NONMATCH("asm/non_matching/game/stage/background/StageBgUpdate_Zone6Acts12.inc",
u32 green = ((gUnknown_080D5C02[0][i][1] * r6) >> 5) & 0x1F;
u32 blue = ((gUnknown_080D5C02[0][i][2] * r6) >> 5) & 0x1F;
gBgPalette[DISPLAY_WIDTH + i] = ((blue << 10) | (green << 5) | red);
gBgPalette[(15 * 16) + i] = ((blue << 10) | (green << 5) | red);
}
// jumps to _0801D83C for this
@@ -381,7 +381,7 @@ NONMATCH("asm/non_matching/game/stage/background/StageBgUpdate_Zone6Acts12.inc",
u32 green = gUnknown_080D5C02[0][i][1];
u32 blue = gUnknown_080D5C02[0][i][2];
gBgPalette[DISPLAY_WIDTH + i] = ((blue << 10) | (green << 5) | red);
gBgPalette[(15 * 16) + i] = ((blue << 10) | (green << 5) | red);
}
// _0801D83C
@@ -407,7 +407,7 @@ NONMATCH("asm/non_matching/game/stage/background/StageBgUpdate_Zone6Acts12.inc",
u32 green = ((gUnknown_080D5C02[0][i][1] * r6) >> 4) & 0x1F;
u32 blue = ((gUnknown_080D5C02[0][i][2] * r6) >> 4) & 0x1F;
gBgPalette[DISPLAY_WIDTH + i] = ((blue << 10) | (green << 5) | red);
gBgPalette[(15 * 16) + i] = ((blue << 10) | (green << 5) | red);
}
gFlags |= FLAGS_UPDATE_BACKGROUND_PALETTES;
@@ -416,7 +416,7 @@ NONMATCH("asm/non_matching/game/stage/background/StageBgUpdate_Zone6Acts12.inc",
case 7: {
s8 i;
for (i = 0; i < 16; i++) {
gBgPalette[DISPLAY_WIDTH + i] = RGB_BLACK;
gBgPalette[(15 * 16) + i] = RGB_BLACK;
}
gFlags |= FLAGS_UPDATE_BACKGROUND_PALETTES;
gDispCnt &= ~(DISPCNT_BG0_ON);
src/platform/pret_sdl/sdl2.c
+3 -3
View File
@@ -651,7 +651,7 @@ static void RunDMAs(u32 type)
#if !USE_NEW_DMA
dma->dst = (void *)(uintptr_t)(&REG_DMA0DAD)[dmaNum * 3];
#else
dma->dst = (void *)(uintptr_t)(&REG_DMA0DAD)[dmaNum * 2];
dma->dst = (void *)(uintptr_t)(&REG_DMA0DAD)[dmaNum];
#endif
}
} else {
@@ -700,8 +700,8 @@ void DmaSet(int dmaNum, const void *src, void *dest, u32 control)
(&REG_DMA0CNT)[dmaNum * 3] = (size_t)control;
#else
// "64 bit" order
(&REG_DMA0SAD)[dmaNum * 2] = (uintptr_t)src;
(&REG_DMA0DAD)[dmaNum * 2] = (uintptr_t)dest;
(&REG_DMA0SAD)[dmaNum] = (uintptr_t)src;
(&REG_DMA0DAD)[dmaNum] = (uintptr_t)dest;
(&REG_DMA0CNT)[dmaNum] = (size_t)control;
#endif